CARGO

This project will develop a set of tools and libraries for analog and mixed-signal integrated CMOS circuits design, on the basis of the Coriolis toolchain initially designed and optimized for place and route of digital VLSI circuits. The project aims at providing IC designers with library of portable analog cells, which are defined as a set of scripts and libraries containing a generic description of the transistor sizing procedure, a description of portable placement of transistors on the layout, and a routing engine optimized for analog cells. The project will adapt the Coriolis toolchain to fulfill some specific needs of analog design, such as accommodating of the routing constraints of different kind of signals (supply, critical signals), automatic reading of the netlist, management of analog hierarchy. In addition it will extend the analog device library, with integrated capacitors/resistors, and create a library of elementary analog cells aiming at covering basic needs of analog designers (such as Bandgap, Comparator, S/H, ADC, PLL, etc.).