openPCIe2 Root Complex
Open hardware implementation of gen 2 PCIexpress in OpenXC7
This project will develop an open hardware implementation of PCIexpress 2.0, the high-speed serial computer expansion bus standard used to allow computer peripherals to be slotted into a motherboard. When designing open hardware, having such a critical part of a component depend on proprietary components is obviously . The open hardware PCIe/Gen2 Root Complex developed within this project would make a big step towards developing fully open hardware components. Prior efforts only provided a partial implementation, and depended on vendor-provided 'black boxes' that would prevent such designs to be used to create a working, fully open hardware solution.
This project was funded through the NGI0 Core Fund, a fund established by NLnet with financial support from the European Commission's Next Generation Internet programme, under the aegis of DG Communications Networks, Content and Technology under grant agreement No 101092990.
