uberDDR4
High-performance, standalone DDR4 memory controller.
UberDDR4 aims to deliver a high-performance, standalone, fully open-source DDR4 memory controller. Building on the proven success of UberDDR3, which remains the fastest and most capable open-source DDR3 controller available today and is already supported on all AMD/Xilinx 7-series FPGAs as well as the Lattice ECP5. As DDR3 phases out, this project helps maintain high-performance memory solutions for the open hardware community. The work includes developing a new DDR4 controller for next-generation FPGA families such as AMD/Xilinx UltraScale Plus using an architecture designed for easy portability to future tape-out silicon projects, porting UberDDR3 to additional platforms, and improving its performance when used with open FPGA toolchains including openXC7 and scalePnR.
- The project's own website: https://github.com/AngeloJacobo/DDR3_Controller
This project was funded through the NGI0 Commons Fund, a fund established by NLnet with financial support from the European Commission's Next Generation Internet programme, under the aegis of DG Communications Networks, Content and Technology under grant agreement No 101135429. Additional funding is made available by the Swiss State Secretariat for Education, Research and Innovation (SERI).
