SpinalWaves & SpinalTrace

This project will develop two open-source debugging tools — SpinalWaves and SpinalTrace — to simplify the debugging of hardware designs written in SpinalHDL, a high-level hardware generator language (HGL) used to design various computing hardware systems. HGLs like SpinalHDL compile down to industry-standard hardware descriptions such as VHDL and Verilog. Debugging HGL designs is challenging because errors observed in signal values at the compiled low-level hardware are often difficult to trace back to the high-level code that generated them. SpinalWaves will extend waveform visualization by preserving and displaying high-level type information for hardware signals, while SpinalTrace will enable tracing faulty signal transitions back to their source in the original SpinalHDL code. The tools will build on prior work from the Tydi ecosystem, which includes Tywaves and ChiselTrace for the Chisel hardware design language. However, adapting these concepts to SpinalHDL requires new techniques due to differences in the compilation flow, particularly the absence of an intermediate representation such as FIRRTL. The project will therefore develop new mechanisms for extracting program dependency information and inserting instrumentation within the SpinalHDL compilation process. The expected outcome is an integrated, open-source debugging toolkit for SpinalHDL that improves developer productivity, lowers the barrier to hardware design, and strengthens the broader open-source hardware development ecosystem.