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Grant
Theme fund: NGI Zero Core
Start: 2024-12
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Hardware

SMAesH-Mode

Side-channel protected hardware implementation of AES

The security of internet devices relies on cryptography for many features such as secure communications, secure boot or user authentication. In many cases, the underlying cryptographic building blocks are implemented in hardware for efficiency and/or security reasons. Further, many devices can be attacked through physical side-channel leakage such as power consumption or electromagnetic emanations (EM). Critically, these attacks do not strictly require direct physical access to the device, and attack based only on remote physical access have been demonstrated (e.g. EM a few meters way).

Nowadays, AES remains a fundamental block cipher in most security solutions. In this context, SMAesH is a open-source side-channel protected hardware implementation of the AES that could be used in secure micro-controllers for direct use in protocols that rely on AES, or as a building block for secure storage. However, a block cipher is rarely used alone, and is instead integrated in a mode of operation that provides confidentiality and/or integrity, which are currently not supported by the existing SMAesH IP.

This project mainly aims at extending SMAesH to include support for common modes of operation (GCM, CBC and CTR). Besides, our goal is to make SMAesH easy to integrate with open-source hardware designs by implementing a standard TileLink bus interface.

Run by SIMPLE-Crypto

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This project was funded through the NGI0 Core Fund, a fund established by NLnet with financial support from the European Commission's Next Generation Internet programme, under the aegis of DG Communications Networks, Content and Technology under grant agreement No 101092990.