Real Time Litex Extension
Real time capabilities for FPGA-based RISC-V core
The Core-Local Interrupt Controller (CLIC) is a RISC-V standard extension that enhances real-time performance by enabling the prioritization of interrupts based on levels and priorities. This feature allows developers to have fine-grained control over interrupt prioritization, leading to more efficient handling of real-time events. In this project, we propose to replace the original interrupt controller of the VexRiscv based processor core family with CLIC. By implementing the CLIC, VexRiscv can efficiently propagate the highest-level, highest-priority pending interrupt to the core, significantly improving real-time responsiveness. The CLIC implementation also introduces features like selective hardware vectoring and the special register (xnxti CSR), which further optimize interrupt handling.
- The project's own website: https://disdi.github.io/linux_RT
This project was funded through the NGI0 Core Fund, a fund established by NLnet with financial support from the European Commission's Next Generation Internet programme, under the aegis of DG Communications Networks, Content and Technology under grant agreement No 101092990.
