Open Logic - Signal Processing Elements
Standard Library for FPGA development
Open Logic is an open-source FPGA standard library focused on delivering production-ready building blocks for digital design. Open Logic focuses on high-quality for example by providing simulations with 100% code coverage, a proper CI setup and being portable between all toolchains.
The proposed funding is targeted to expand the library with 32 specialized fixed-point DSP components, including NCOs, FIR filters, CIC filters, and function-approximation units. Each component will be delivered with a bit-exact Python reference model to enable model-based design and seamless verification. While some blocks can draw on existing PSI-Fix implementations, significant engineering work is required to elevate them to the robustness, maintainability, and documentation standards established by Open Logic. This includes refactoring, bug fixes, clean interfaces, uniform test structures, and full integration into the library’s tooling ecosystem.
The resulting DSP suite will substantially broaden Open Logic’s applicability, reduce development risk for adopters, and strengthen its position as a comprehensive, industry-grade open-source FPGA library.
- The project's own website: https://github.com/open-logic/open-logic
This project was funded through the NGI0 Commons Fund, a fund established by NLnet with financial support from the European Commission's Next Generation Internet programme, under the aegis of DG Communications Networks, Content and Technology under grant agreement No 101135429. Additional funding is made available by the Swiss State Secretariat for Education, Research and Innovation (SERI).
