FPGA Fault Injection Testing

Fault injection aims at disrupting the orderly way in which data and instructions in a chip are processed. This can be achieved, e.g., by malicious glitches that briefly interrupt the supplied voltage of the chip. To better protect against faults, countermeasures need to be implemented, such as glitch sensors that can detect these adversarial conditions. Due to the wide range of fault injection methods, the development of glitch sensors is time-consuming and requires a wide range of lab capabilities.

Within the context of FPGAs, such testing is often not feasible due to their unique configuration based on a bitstream. In this project we seek to demonstrate that in-situ fault injection by creating short-circuits in an FPGA is possible and that this can be used to emulate similar effects in the circuit that otherwise would require costly external instruments. In addition, since FPGAs can be reconfigured quickly, it is possible to rapidly test a wide range of fault injection configurations. We then implement and compare glitch sensor designs in the FPGA and compare them to the state of the art (attacks and countermeasures) with the expectation to improve over previous results, as the fine-grained in-situ fault injection process is expected to offer more control over the testing process, resulting in a better calibration of the glitch sensor.