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Online session on future of European open hardware

NGI Zero chip projects showcase permission-free innovation at NGI Forum

At the Next Generation Internet Forum event on May 18th 2021, NLnet hosted an online session on the future of European chip development. State-of-the-art projects creating open hardware and permissionless design tools demonstrate how Europe can regain control over electronic devices through transparent, collaborative design and together with industry and policy representatives we discuss what this means for the future.

Europe has being losing market share in the semiconductor industry, with chip production down to 10% of world production. And at the same time, semiconductor chips are at the heart of a majority of modern technology and form a core part of today’s society. With global chip shortages plaguing the tech sector, our dependency on chip imports is becoming a liability for our industry, security and sovereignty - and may affect European society at many fundamental levels. Eurocommissioner Thierry Breton has recently stated that Europe should at least double its current output in the next decade, and that ambition should probably only be the start.

The Next Generation Internet initiative has been supporting various promising initiatives working towards free and open chips built on open design tooling that is accessible to everyone. Among the hundreds of projects supported by NGI Zero (which consists of two complementary grant programs to improve search and discoverability and develop privacy and trust enhancing technologies) there quite a number of innovative free and open source efforts working to advance the state of art in open hardware.

Open hardware chips provide trust through transparency, permission-free innovation and digital sovereignty through distributed knowledge. During the workshop we look into a number of ongoing efforts and discuss where to go next.


Program workshop May 18

The workshop is split across two sessions, each lasting one hour. The first session covers state-of-the-art projects funded by NGI Zero that showcase open hardware tools and components for trustworthy computing. The second session looks forward to a future European silicon ecosystem with a panel of industry and policy leaders who discuss the role of open source technology in a resurgent European semiconductor landscape, moderated by Rob Taylor (LibreCores/Chipflow).

Open hardware projects funded by NGI Zero (15-16h CEST)

  • Thomas Kramer
    LibrEDA - libre-software framework for physical design of digital integrated circuits [ PDF ]
  • Staf Verhaegen
    Chips4Makers ASICs - ASIC production flows compatible with reciprocal licensed blocks using a libre licensed software flow [ PDF ]
  • Luke Kenneth Casson Leighton
    Libre-SOC - Development of libre-licensed hybrid 3D CPU-GPU-VPU [ MP4 ]
  • David Lanzendoerfer
    LibreSilicon - open source semiconductor manufacturing process standard [ PDF ]
  • Xianjun Jiao
    Openwifi - open source Wi-Fi chip design [ PDF ]
  • Charles Papon
    SpinalHDL, VexRiscv, SaxonSoc - design tools and facilities to develop open source system-on-chip optimized for FPGA [ PDF ]

Panel discussion moderated by Rob Taylor (16-17h CEST)

Biographies of panelists

  • Andrew 'bunnie' Huang is a researcher and hardware hacker with a Ph.D in electrical engineering and authored the publicly available book 'Hacking the Xbox: An introduction to Reverse Engineering' as well as 'The Essential Guide to Electronics in Shenzhen'. Huang lead the embedded computer Chumby-project and designed the open-source hardware laptop motherboard Novena. Currently he is developing the hardware and software security enclave Betrusted to provide safe defaults for your devices.
  • Olof Kindgren is an open source software and silicon advocate who became involved with free and open source silicon through the OpenRISC-project in 2011. Kindgren is a senior digital design engineer working for Qamcom Research & Technology, He spearheads and contributes to projects including the FuseSoC IP core package manager and SERV, the award-winning RISC-V CPU. In 2015 he co-founded the Free and Open Source Silicon Foundation (FOSSi) to promote and assist free and open digital hardware design as an open, inclusive and vendor-independent group.
  • Sally Ward-Foxton covers AI technology and related issues for EETimes.com and all aspects of the European industry for EETimes Europe magazine. Sally has spent more than 15 years writing about the electronics industry from London, UK. Se has written for Electronics Design, ECN, Electronic Specifier: Design, Components in Electronics and many more. She holds a Master's degree in Electrical and Electronic Engineering from the University of Cambridge.
  • David Tester during the last 20 years has led development of ten complex SoC-products and participated in the development of over twenty semiconductor products for the GPS / GNSS, cordless phone, cell phone, DVB and DVD digital TV, TETRA, Wi-Fi, PC and NFC markets. His high volume, standard product background crosses every level from system architecture to digital and analog silicon development. He has deep experience leading product developments for start-up's including Air, Ultrahaptics, Symbionics, UltraSOC and Thalia over the last 10 years. Previously he was with Rockwell Semiconductor, Dialog and LIS Logic. He is an IET Fellow and Chartered Engineer.
  • Maria M. Valado manages the Emergering Business Program (EBP) of imec.IC-link, the unit of imec in charge of providing access to foundry services and support for start-ups, scale-ups, SMEs and universities. The goal of EBP is to ensure future growth for the unit by developing and incubating new businesses. Her responsibilities are the coordination and support of the different businesses of the portfolio, which include both advanced imec-technologies, offered as Multi-Project Wafer services in photonics and power electronics, as well as business opportunities taking advantage of new markets and consistent with imec.IC-link main business. Before joining imec, she worked as a scientific researcher for several years and holds a PhD in Applied Physics jointly awarded by the Universities of Pisa and Heidelberg.
  • Jana Nieder is the coordinator of the Advanced Materials and Computation Cluster - being aware of the work of our various research groups researching for new paradigms in computation type of platforms such as spintronics neuromorphic, photonics neuromorphic and quantum photonics, e.g. for AI applications; and research related to atomically precise e.g. 2D materials for future emerging technologies. Jana is a physicist (PhD in 2011, FU Berlin), with postdoc experience at ICFO (Barcelona, Spain) and IGC (Lisbon, Portugal). Since 2016, she is Research Group Leader of the "Ultrafast Bio- and Nanophotonics" group at INL, leading an interdisciplinary team of physicists, physics engineers, bioengineers and chemists performing research in the areas of i) Advanced Bioimaging & Sensing, ii) Integrated Nanophotonics and iii) Quantum Photonics.
  • Mohamed Kassem is the cofounder and CTO of efabless corporation. A community-propelled hardware desigh company applying collective community knowledge & creativity to all aspects of semiconductor product development. Prior to launching efabless in 2014, Mohamed held several technical and global leadership positions within TI's Wireless Business Unit. He joined TI in 2000 at the beginning of the digital telephony revolution fueled by the unprecedentend integration of majoh phone functions on a single SoC. He led the first development of 45nm, 28nm analog & mixed-signal IP functions for wireless applications processors. Mohamed holds a Masters degree in Electrical Engineering from the University of Waterloo, Ontaria, Canada and BSEE from Ain Sham University, Cairo, Egypt.