Send in your ideas. Deadline October 1, 2024
Theme fund: NGI0 PET
Start: 2019-12
End: 2022-10
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Libre Silicon compiler

Synthesize, place and route hardware description to silicon

LibreSilicon Compiler (LSC) is a place + route suite for silicon. The main focus of this project is to produce legal and efficient silicon layouts from digital netlists (e. g. BLIF, EDIF). Traditionally the placement and routing problem are handled separately and in sequence and the final layout is given by the routing step. In this setup the routing step gains information from placement but not the other way around. LSC attempts to shift this paradigm to create a feedback loop between the two main problems to improve the solution. Furthermore we are incorporating formal methods to produce the compiler software and to verify resulting layouts. While the latter is standard practice, proving properties of the compiler software itself is only widespread in the domain of software compilers. This exercise will be favored by the use of the programming language Haskell and advanced theorem provers. Finally this software aims to profit from explicit module hierarchies given by the developers of digital logic in register-transfer level (e. g. Verilog, Chisel). Greedy solutions can be found for highly modularised chips: when logic is not inlined in the conventional software compiler sense, the size of problem instances is kept small. This also gives parallelism for free, as the dependency tree is resolved from the bottom up.

Why does this actually matter to end users?

Behind the screens of every mobile phone, laptop or tablet you will find essentially the same components that are produced by a small number of companies. Using patents and closed-off work methods these monopolists hold a firm grip on how essential technical building blocks of consumer electronics are actually made. Not only does this prevent innovation in the market, it also makes the devices that users, companies and governments across the world rely on for vital services and infrastructures essentially untrustworthy. If you cannot verify that the parts that make your device work are secure, can you really trust the device at all?

One of the ways to break through this standstill, is to construct computer parts from the ground up and make your designs open for everyone to check and verify. Combine this open hardware with open source software and you have a device that, with the right knowledge and skills, is completely transparent and customizable. This project aims to develop an open source production process for custom computer chips, making manufacturing of these chips quick, easy, inexpensive and auditable. NGI Zero funds various parts of this project, like this effort to create open and transparent design plans for computer chips.

Run by LibreSilicon

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This project was funded through the NGI0 PET Fund, a fund established by NLnet with financial support from the European Commission's Next Generation Internet programme, under the aegis of DG Communications Networks, Content and Technology under grant agreement No 825310.