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Theme fund: NGI0 PET
Start: 2021-02
End: 2022-10

Luna PnR

A versatile and fast new open-source place and route tool

Making a custom chip (ASIC) requires a vast ecosystem of expensive commercial tools, limiting the application of ASICs to large companies; this greatly hampers innovation. Project Luna aims to mitigate this situation by providing a robust open-source automated place & route tool, which forms an important but mostly missing part of the ASIC design flow. This way, universities, makers, small companies and start-ups can get access to ASIC design tools. Luna targets ASIC processes larger than 100nm, which makes it ideal for designing mixed-signal (analogue + digital) chips used in sensors and IOT devices. It integrates well with existing open-source tools, such as YosysHQ's Yosys (a logic synthesis tool) and KLayout (a manual ASIC layout tool), and commercial tools via industry standard file formats. In addition to the affordability issue, Luna allows a full-circle chain-of-trust to be established between designer and chip manufacturer because of its fully open-source nature. During its development, Luna will be used to manufacture designs via our industrial partners in order to verify the correctness and usability of the software. The goal is to present a minimal viable product consisting of a GUI, working place & route and timing verification.

Why does this actually matter to end users?

When you go to a store to buy a laptop or mobile phone, you may see different brands on the outside but choice in terms of what is inside the box (in particular the most expensive component, the processor technology) is pretty much limited to the same core technologies and large vendors that have been in the market for decades. This has a much bigger effect on the users than just the hefty price tag of the hardware, because the technologies at that level impact all other technologies and insecurity at that level break security across the board.

In the field of software, open source has already become the default option in the market for any new setup. In hardware, the situation is different. Users - even very big users such as governments - have very little control over the actual hardware security of the technology they critically depend on every day. Security experts continue to uncover major security issues, and users are rightly concerned about the security of their private data as well as the continuity of their operations. But in a locked-down market there is little anyone can do, because the lack of alternatives. European companies are locked out of the possibility to contribute solutions and start new businesses that can change the status quo.

To break through this standstill, developer communities are working hard to deliver open, trustworthy and accessible alternative computer hardware that anyone can use, study, modify and distribute, just like they can with open source software. Unfortunately restraining and expensive design tools prevent these communities from solving important problems in their designs. This project aims to provide an open source alternative tool for placing and routing, an essential stage in making chips and boards that can make or break its performance, sustainability and usefulness. This freely available and transparent alternative will work seamlessly with other tools, which all together create a toolkit that can advance innovation on equal footing and ultimately improve the security, reliability and trustworthiness of the many devices we use everyday.

Run by Moseley Instruments

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This project was funded through the NGI0 PET Fund, a fund established by NLnet with financial support from the European Commission's Next Generation Internet programme, under the aegis of DG Communications Networks, Content and Technology under grant agreement No 825310.